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  11/04/04 benefits  improved gate, avalanche and dynamic dv/dt ruggedness  fully characterized capacitance and avalanche soa  enhanced body diode dv/dt and di/dt capability  www.irf.com 1 d 2 pak irfs3307 to-220ab IRFB3307 to-262 irfsl3307 IRFB3307 irfs3307 irfsl3307 hexfet   power mosfet applications  high efficiency synchronous rectification in smps  uninterruptible power supply  high speed power switching  hard switched and high frequency circuits s d g s d g s d g s d g v dss 75v r ds ( on ) typ. 5.0m  max. 6.3m  i d 130a absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, v gs @ 10v a i d @ t c = 100c continuous drain current, v gs @ 10v i dm pulsed drain current  p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery  v/ns t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) mounting torque, 6-32 or m3 screw avalanche characteristics e as (thermally limited) single pulse avalanche energy  mj i ar avalanche current  a e ar repetitive avalanche energy  mj thermal resistance symbol parameter typ. max. units r jc junction-to-case  ??? 0.61 r cs case-to-sink, flat greased surface , to-220 0.50 ??? c/w r ja junction-to-ambient, to-220  ??? 62 r ja junction-to-ambient (pcb mount) , d 2 pak  ??? 40 300 max. 130  91  510 270 see fig. 14, 15, 16a, 16b 250 11 -55 to + 175 20 1.6 10lb in (1.1n m)
 
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 calculated continuous current based on maximum allowable junction temperature. package limitation current is 75a.  repetitive rating; pulse width limited by max. junction temperature. limited by t jmax , starting t j = 25c, l = 0.096mh r g = 25 ? , i as = 75a, v gs =10v. part not recommended for use above this value. i sd 75a, di/dt 530a/s, v dd v (br)dss , t j 175c.  pulse width 400s; duty cycle 2%. s d g  c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss .  c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss .  when mounted on 1" square pcb (fr-4 or g-10 material). for recom mended footprint and soldering techniques refer to application note #an-994.     
      static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 75 ??? ??? v ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.069 ??? v/c r ds(on) static drain-to-source on-resistance ??? 5.0 6.3 m ? v gs(th) gate threshold voltage 2.0 ??? 4.0 v i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 200 na gate-to-source reverse leakage ??? ??? -200 r g gate input resistance ??? 1.5 ??? ? f = 1mhz, open drain dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 98 ??? ??? s q g total gate charge ??? 120 180 nc q gs gate-to-source charge ??? 35 ??? q gd gate-to-drain ("miller") charge ??? 46 ??? t d(on) turn-on delay time ??? 26 ??? ns t r rise time ??? 120 ??? t d(off) turn-off delay time ??? 51 ??? t f fall time ??? 63 ??? c iss input capacitance ??? 5150 ??? pf c oss output capacitance ??? 460 ??? c rss reverse transfer capacitance ??? 250 ??? c oss eff. (er) effective output capacitance (energy related) ??? 570 ??? c oss eff. (tr) effective output capacitance (time related)  ??? 700 ??? diode characteristics symbol parameter min. typ. max. units i s continuous source current ??? ??? 130  a (body diode) i sm pulsed source current ??? ??? 510 a (body diode)   v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 38 57 ns t j = 25c v r = 64v, ??? 46 69 t j = 125c i f = 75a q rr reverse recovery charge ??? 65 98 nc t j = 25c di / dt = 100a / s  ??? 86 130 t j = 125c i rrm reverse recovery current ??? 2.8 ??? a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) i d = 75a r g = 3.9 ? v gs = 10v  v dd = 48v t j = 25c, i s = 75a, v gs = 0v  integral reverse p-n junction diode. conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma  v gs = 10v, i d = 75a  v ds = v gs , i d = 150a v ds = 75v, v gs = 0v v ds = 75v, v gs = 0v, t j = 125c mosfet symbol showing the v ds = 60v conditions v gs = 10v  v gs = 0v v ds = 50v ? = 1.0mhz v gs = 0v, v ds = 0v to 60v  , see fig.11 v gs = 0v, v ds = 0v to 60v  , see fig. 5 conditions v ds = 50v, i d = 75a i d = 75a v gs = 20v v gs = -20v
 
 www.irf.com 3 fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage 2 4 6 8 10 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 60s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 75a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 20 40 60 80 100 120 140 q g total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 60v v ds = 38v v ds = 15v i d = 75a 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 60s pulse width tj = 25c 4.5v vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 60s pulse width tj = 175c vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v
 
 4 www.irf.com fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 7. typical source-drain diode forward voltage fig 11. typical c oss stored energy fig 9. maximum drain current vs. case temperature fig 12. maximum avalanche energy vs. draincurrent 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 v sd , source-to-drain voltage (v) 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 100 120 140 i d , d r a i n c u r r e n t ( a ) limited by package 0 1020304050607080 v ds, drain-to-source voltage (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 e n e r g y ( j ) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 1200 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 8.6a 12a bottom 75a -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 70 75 80 85 90 95 100 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100sec 1msec 10msec dc
 
 www.irf.com 5 fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.2911 0.000484 0.3196 0.005529 j j 1 1 2 2 r 1 r 1 r 2 r 2 c ci i / ri ci= i / ri 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 75a
 
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    fig 16. threshold voltage vs. temperature  
     
    

    -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 150a i d = 250a i d = 1.0ma i d = 1.0a 100 200 300 400 500 600 700 800 900 1000 di f /dt (a/s) 0 5 10 15 20 i r r m ( a ) i f = 30a v r = 64v t j = 25c _____ t j = 125c ---------- 100 200 300 400 500 600 700 800 900 1000 di f /dt (a/s) 0 5 10 15 20 i r r m ( a ) i f = 45a v r = 64v t j = 25c _____ t j = 125c ---------- 100 200 300 400 500 600 700 800 900 1000 di f /dt (a/s) 0 50 100 150 200 250 300 350 400 q r r ( n c ) i f = 30a v r = 64v t j = 25c _____ t j = 125c ---------- 100 200 300 400 500 600 700 800 900 1000 di f /dt (a/s) 0 50 100 150 200 250 300 350 400 q r r ( n c ) i f = 45a v r = 64v t j = 25c _____ t j = 125c ----------
 
 www.irf.com 7 fig 22a. switching time test circuit fig 22b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t + - fig 21b. unclamped inductive waveforms fig 21a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 23a. gate charge test circuit fig 23b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 20. !  
   for n-channel hexfet   power mosfets 1k vcc dut 0 l 
 
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  p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period "     " + - + + + - - -     ?      ? 
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 dimensions are shown in millimeters (inches) lead assignments 1 - gate 2 - drain 3 - source 4 - drain - b - 1.32 (.052) 1.22 (.048) 3x 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 4.69 (.185) 4.20 (.165) 3x 0.93 (.037) 0.69 (.027) 4.06 (.160) 3.55 (.140) 1.15 (.045) min 6.47 (.255) 6.10 (.240) 3.78 (.149) 3.54 (.139) - a - 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) 15.24 (.600) 14.84 (.584) 14.09 (.555) 13.47 (.530) 3x 1.40 (.055) 1.15 (.045) 2.54 (.100) 2x 0.36 (.014) m b a m 4 1 2 3 notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 3 outline conforms to jedec outline to-220ab. 2 controlling dimension : inch 4 heatsink & lead measurements do n ot include burrs. 

  
   
   

     
        
                    note: "p" in assembly line position indicates "lead-free" to-220ab packages are not recommended for surface mount application.
 
 www.irf.com 9 to-262 package outline (dimensions are shown in millimeters (inches)) to-262 part marking information  
  
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  or  igbt 1- gate 2- collector 3- emitter 4- collector
 
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 (dimensions are shown in millimeters (inches))   
                              
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 www.irf.com 11 data and specifications subject to change without notice. this product has been designed and qualified for the automotive [q101] market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 11/04  


 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge.


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